As a transmission speed in communications between LSIs, or PWBs has rapidly increased in recent years, so a serial transmission method whereby both data and clock are transmitted by superposing one on another in one signal line has been in widespread use in place of a parallel transmission method using the conventional parallel-running clocks. With the serial transmission method, there is the need for increasing a transmission speed per one signal line by a quantum leap, which is accompanied by an increase in attenuation of a high-frequency component of a transmission signal, due to the skin effect of a transmission line conductor, or the dielectric loss of an insulating material, and so forth, so that deterioration in signal quality dependent on a transmission signal line, so-called ISI (Inter-Symbol Interference), appears on an input waveform at a signal-receiving end. For this reason, eye patterns at the signal-receiving end come to be narrowed down in both a time-axis direction (width), and an amplitude direction (height), and this creates a cause for inducing a reception error.
As a method for solving this problem, there has been generally adopted a method (for equalization at a transmission end) whereby a waveform as pre-distorted by taking into account a portion of a waveform, corresponding to ISI of a transmission line, is sent from a transmission end to thereby widen an eye at a receiving end.
For example, in WO2005/060193, use is made of a data output circuit as schematically shown in FIG. 19. The data output circuit in FIG. 19 is comprised of delay circuits DC1, DC2, each for effecting delay corresponding to one data symbol time length (maximum time permissible for transmission of one-bit data, the reciprocal of a data rate), output buffers BF1, BF2, BF3, each having a function for drive power adjustment, and a waveform adder MIX. In this case, there is shown an example where a transmission data signal is branched into three paths and waveforms with a drive power adjusted by a portion thereof, corresponding to three data symbol time lengths, respectively, are added thereto, thereby implementing waveform equalization. With this output circuit, the transmission data signal is directly delivered to the output buffer BF1 while the transmission data signal delayed by one data symbol time length, and the transmission data signal delayed by two data symbol time lengths are delivered to the output buffers BF2, BF3, respectively. Output signals from the output buffers BF1, BF2, BF3, respectively, are added together to be subsequently outputted to a transmission line. A control variable for waveform equalization can be adjusted by undergoing variation the number of data symbols for waveform addition, and respective drive powers of the output buffers BF1, BF2, and BF3. Thus, ISI at a symbol point can be reduced by adding up respective waveforms on a symbol time unit basis.